1. Field of the Invention
The present invention relates to a memory circuit including a resistive memory element such as a CBRAM memory element, also called a PMC element (PMC: programmable metallization cell). The present invention further relates to a method for operating such a memory circuit.
2. Description of the Related Art
A CBRAM memory element, which in the following shall be called resistive memory element, comprises a dielectric material in which a conductive path can be established and degenerated. By applying electrical field, ions from a conductive material of an electrode move into the dielectric material and form the conductive path. By applying a reversed electrical field, the ions of the conductive material are removed from the dielectric material back towards the electrode in such a way that the resistive memory element is rendered non-conductive. In other words, the resistive memory element can have different resistance states such as a low resistance state and a high resistance state.
While programming the resistive memory element from the high resistance state to the low resistance state, the changing of the resistance takes place quite rapidly such that while applying a predetermined voltage on the resistive memory element the current through the resistive memory element increases quickly as the resistance drops. Therefore, while programming the resistive memory element a limitation of the current is necessary so that the resistive memory element is not damaged while in the low resistance state. In order to deal with this physical behavior, a settable reference current source is used for limiting the current through the resistive memory element to a compliance current while programming the resistive memory element. As the changing of the resistance of the resistive memory element during the programming from the high resistance state to the low resistance state is quite short, the current through the resistive memory element results in a charging the parasitic capacity of the bit line to which the resistive memory element is coupled. Due to the capacity of the bit line, the current peak through the resistive memory element during the charging of the bit line capacity is determined by the resistance of the low resistance state of the resistive memory element, the resistance of the bit line and the resistance of a selection transistor by which the resistive memory element is coupled to the bit line. The reference current supplied by the reference current source has therefore no influence on the current flowing through the resistive memory element during the rapid changing of its resistance. The current flowing through the resistive memory element during the rapid changing of its resistance may be damaging to the resistive memory element, particularly when applied for a time period of more than 40 ns.